N101-023 TITLE: Processor Architectures for Multi-Mode Multi-Sensor Signal Processing

TECHNOLOGY AREAS: Air Platform, Sensors, Electronics

ACQUISITION PROGRAM: PMA-290, Maritime Patrol and Reconnaissance Aircraft

OBJECTIVE: Develop innovative processor architectures for multi-mode radars and fusion with other sensors for automatic target recognition.

DESCRIPTION: The DoD has made major investments in the development of Active Electronically Scanned Array (AESA) radar technology that provide enhancements in beam agility and provide for near simultaneous multi-mode operation. The full exploitation of these capabilities, when considering Pulse Mode Interleaving (PMI), present processing architecture challenges. The processing architectures must be able to accommodate adaptation to the scenario and environment. In addition, recognition algorithms that exploit Inverse Synthetic Aperture Radar (ISAR) and Infrared (IR) imagery may require significantly more and different processing capabilities to be automated to the level required to relieve operator workload.

Driven by the commercial graphics and gaming industry, a new class of general purpose graphics processors units (GPGPU) and many core processing architectures are now available for power, cost and weight constrained DoD platforms. For data intensive parallel signal processing applications, computational performance improvements of 10x to 100x over current digital signal processing (DSP) implementations are achievable. In addition, these new commercial off the shelf (COTS) architectures provide low cost, high through-put/watt efficiency, and high productivity programming. While this type of processor has been available for several years, only in the last two years has high level language software development been possible. The continued development of graphics processor architectures are expected to endure as the graphics industry and the core processor industry continues to evolve to meet commercial market demands in mobile video and gaming. The suitability of GPGPU based processing for a wide range of radar applications is an open question. The specific implementation method can dramatically impact overall processing speed.

The primary goal of this effort is to understand how to optimally utilize GPGPU processing to dramatically increase the overall computational speed of radar based target recognition algorithms utilizing moving target indicator, high range resolution and imaging modes.

PHASE I: Design and demonstrate feasibility of processor architectures that enable AESA exploitation and automatic target recognition. Develop an RDT&E plan addressing performance metrics.

PHASE II: Using the concept developed in Phase I, evolve the processor architecture design and demonstrate key aspects and performance metrics.

PHASE III: Finalize the technology and in conjunction with radar system manufacturers, transition to the Fleet.

PRIVATE SECTOR COMMERCIAL POTENTIAL/DUAL-USE APPLICATIONS: The general methods developed could be applicable to a wide range of feature classification needs ranging from those of homeland security to the medical field.

REFERENCES:
1. Georgia Institute of Technology; Programming tools facilitate use of video game processors for defense needs; http://www.physorg.com/news165059236.html

2. Georgia Tech Research Institute; Inexpensive Parallel Processing: Programming Tools Facilitate Use of Video Game Processors for Defense Needs; http://www.gtri.gatech.edu/news/programming-tools-facilitate-use-video-game-process

3. Shuai Che, Michael Boyer, Jiayuan Meng, David Tarjan, Jeremy W. Sheaffer, Kevin Skadron. A Performance Study of General-Purpose Applications on Graphics Processors Using CUDA. http://www.cs.virginia.edu/~skadron/Papers/cuda_jpdc08.pdf

KEYWORDS: inverse synthetic aperture radar; automatic target recognition; ship and small craft classification; data fusion; multi-mode radar; general purpose graphics processors units

** TOPIC AUTHOR (TPOC) **

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